Port Structures and Operation
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All four ports in the 80C51 are bidirectional. Each consists of a latch (Special Function Registers P0 through P3), an output driver, and an input buffer. The output drivers of Ports 0 and 2, and the input buffers of Port 0, are used in accesses to external memory. In this application, Port 0 outputs the low byte of the external memory address, time-multiplexed with the byte being written or read. Port 2 outputs the high byte of the external memory address when the address is 16 bits wide. Otherwise, the Port 2 pins continue to emit the P2 SFR content.
All the Port 3 pins are multifunctional. They are not only port pins, but also serve the functions of various special features as listed below:
Port Pin Alternate Function
P3.0 RxD (serial input port)
P3.1 TxD (serial output port)
P3.2 INT0 (external interrupt)
P3.3 INT1 (external interrupt)
P3.4 T0 (Timer/Counter 0 external input)
P3.5 T1 (Timer/Counter 1 external input)
P3.6 WR (external Data Memory write strobe)
P3.7 RD (external Data Memory read strobe)
The alternate functions can only be activated if the corresponding bit latch in the port SFR contains a 1. Otherwise the port pin remains at 0.
