Addressing Modes
..............................................................................................................

The addressing modes in the 80C51 instruction set are as follows:

Direct Addressing
In direct addressing the operand is specified by an 8-bit address field in the instruction. Only internal Data RAM and SFRs can be directly addressed.
Indirect Addressing
In indirect addressing the instruction specifies a register which contains the address of the operand. Both internal and external RAM can be indirectly addressed. The address register for 8-bit addresses can be R0 or R1 of the selected bank, or the Stack Pointer. The address register for 16-bit addresses can only be the 16-bit “data pointer” register, DPTR.
Register Instructions
The register banks, containing registers R0 through R7, can be accessed by certain instructions which carry a 3-bit register specification within the opcode of the instruction. Instructions that
access the registers this way are code efficient, since this mode eliminates an address byte. When the instruction is executed, one of the eight registers in the selected bank is accessed. One of four banks is selected at execution time by the two bank select bits in the PSW.
Register-Specific Instructions
Some instructions are specific to a certain register. For example, some instructions always operate on the Accumulator, or Data Pointer, etc., so no address byte is needed to point to it. The opcode itself does that. Instructions that refer to the Accumulator as A assemble as accumulator specific opcodes.
Immediate Constants
The value of a constant can follow the opcode in Program Memory. \
For example,
MOV A, #100
loads the Accumulator with the decimal number 100. The same number could be specified in hex digits as 64H.
Indexed Addressing
Only program Memory can be accessed with indexed addressing, and it can only be read. This addressing mode is intended for reading look-up tables in Program Memory A 16-bit base register (either DPTR or the Program Counter) points to the base of the table, and the Accumulator is set up with the table entry number. The address of the table entry in Program Memory is formed by adding the Accumulator data to the base pointer. Another type of indexed addressing is used in the “case jump” instruction. In this case the destination address of a jump instruction is computed as the sum of the base pointer and the Accumulator data.
· Home
· 8051 Forum
· Active Topics
· 8051 Free Projects
· Blog
· Top 10
· Datasheets
· Electronic Tutorials
· Electronic Projects
· 8051 Tutorials
· 8051 Course
· 8051 Code Library
· Visual Basic for mC
· 8051 Programmer
· Assembler/IDE
· Products
· Ebooks
· Supporting Tools
· Tag Cloud
· Guest Book
· Contact Me
· Privacy policy

8051 Microcontroller Projects, free ebooks, project codes, AVR Projects, 8051 tutorials, electronic projects, ECE CSE BE final year projects, Embedded systems, AVR codes, embedded technology, LCD Interfacing tutorial,final year project ideas project downloads, engineering projects, Examples projects, 8051 Libraries, 8052, Microcontroller, Microprocessor, 8085, 8051 codes, PCB designing, Project Kits, kit